The present invention relates generally to methods for manufacturing semiconductor devices, and more particularly to methods for patterning semiconductor substrates.
In conventional lithography practices used for manufacturing semiconductor devices, it is common practice to use the same focus position for the entire exposure step. In other words, the field of the semiconductor substrate which is being exposed experiences a common focus depth across the field and this depth is constant during the entire exposure time. A problem with this technique is that when the semiconductor wafer is not sufficiently planar, the image focus cannot be maintained within the entire exposure area. Additionally, the depth of focus (which is the range of the wafer""s vertical position relative to the lens where the image contrast is sufficient to create an acceptable feature size) is rather shallow in most lithography processes used in producing advanced semiconductor devices today. A shallow depth of focus means that the process window is narrow or small. In a manufacturing environment, it is preferred to have a more robust process (one which operates under a larger process window) to compensate for variations between numerous tools (e.g. scanners), between wafer lots, and between wafers within a lot.
A technique which was devised to overcome these problems is known as focus latitude enhancement exposure (FLEX). Using a FLEX technique, the exposure process is divided into two or more parts. A first part consists of exposing the entire field area at one focus position. After the first exposure, the wafer is then moved either closer to or farther away from the bottom of the lens (usually by moving the wafer stage up or down) so that the second exposure has a focus position different from the first. By utilizing two or more focus positions in a FLEX process, the depth of focus overall is increased such that the process is more tolerant to 1) variations in topography across the wafer, 2) focal deviation across the field inherent in the projection optics, and 3) errors which may occur in setting the focus.
Although the FLEX process has the advantage of increasing the depth of focus, it also has limitations. For example, the FLEX process is devised to work in conjunction with a step and repeat exposure technique. A step and repeat exposure technique is one in which the entire image field of a reticle is exposed at the same time. After exposure, the wafer is moved in a lateral direction to a new field area. Another exposure occurs through the same reticle but at a new position on the wafer. This process is then repeated until all areas of the wafer have been exposed, thus being called a step and repeat process. For a step and repeat process which utilizes FLEX, the entire image field is exposed at a first wafer position and then again at a second wafer position (different from the first in a vertical direction, i.e. along the optical axis, again usually achieved by moving the wafer stage up or down). Only after exposure at two different vertical positions is the wafer moved laterally to expose a different field area. It should be noted that more than two exposures may be required in the FLEX process to achieve the desired results in certain applications where the depth of focus of the lithography process is extraordinarily shallow relative to the range of focal deviation which needs to be accommodated.
To alleviate the need of excessively large and costly lenses to expose large fields, a technique known as step and scan exposure has evolved. In a step and scan process, exposure is confined to a small area often referred to as a slit. To expose an entire field area of a wafer, the reticle and the wafer are simultaneously, and synchronously, scanned across the slit. This is accomplished by moving the wafer in one lateral direction while moving the reticle in an opposite lateral direction beneath the slit. Traditionally with the step and scan process, the focus position is held constant throughout the exposure and across the entire field. Accordingly, it has a shallow depth of focus (and all the drawbacks associated therewith as explained above) and it cannot maintain adequate focus if the wafer topography is not sufficiently planar. For example, existing step and scan tools often can not achieve a depth of focus which is sufficient for defining critical dimensions in the 130 nm (0.13 xcexcm) node as defined by the International Technology Roadmap for Semiconductors (ITRS).
To broaden the depth of focus using a step and scan technique, one may implement a FLEX technique. However, to do this would require scanning the entire exposure area two or more times, once at the first focus position and then again at each other focus position. Repetitive scanning is inconsistent with desired manufacturing principles of lowering cycle time and increasing throughput. Repetitive scanning is also undesirable because it increases the possibility of a registration error between the first and subsequent exposures.
Another way in which the benefits of FLEX can be integrated into a step and scan process is taught by U.S. Pat. Nos. 5,883,700 and 5,742,376. These patents describe very similar approaches for broadening the depth of focus in a step and scan system, namely oscillating the wafer along the optical axis during the scan. The oscillation occurs at a frequency of at least 30 Hz in the state-of-the-art systems today, and very likely even higher in the future systems. There are several disadvantages to this technique. First, high frequency oscillation of the wafer stage may adversely impact the stability in the scanning dynamics. Furthermore, these systems will be quite costly to a semiconductor manufacturer, requiring new scanner systems because oscillating mechanisms do not exist in the scanning systems of today.
Therefore, a need exists in the industry to improve the step and scan exposure process by increasing the depth of focus achievable without suffering penalties associated with cycle time and throughput and without susceptibility to registration errors. It is also desirable for such a process to be accomplished without expensive modifications to existing scanning systems and without potentially harmful wafer stage oscillation.